Two op-amps third-order sigma–delta modulator with 61-dB SNDR, 6-MHz bandwidth and 6-mW power consumption

نویسندگان

  • Edoardo Bonizzoni
  • Aldo Peña Perez
  • Franco Maloberti
  • Miguel A. Garcia-Andrade
  • A. P. Perez F. Maloberti
چکیده

This low-power RD modulator targets the DVBH requirements and achieves about 10 bit with 6-MHz signal band. Suitable topological modifications enable the realization of a third order modulator with two op-amps. Moreover, a technique for swing reduction of the last op-amp strongly reduces the number of comparators in the quantizer. The power reduction techniques limit the consumption to 6.18 mW, thus yielding a FoM of 0.58 pJ/ conversion. The area of the circuit, fabricated with a 0.18-lm analog CMOS technology, is 0.32 mm. Experimental measurements confirm the behavioral study made accounting for the op-amps limitations.

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E. Bonizzoni, A. Pena Perez, F. Maloberti, M. Garcia-‐Andrade: "Third-Order ΣΔ Modulator with 61-dB SNR and 6-MHz Bandwidth Consuming 6 mW"; 34th

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تاریخ انتشار 2011